MunEDA Webinar - Efficient and Scalable High Sigma Methods for Mixed-Signal / Digital Designs
Circuit Designer, Design Manager, CAD Engineers, EDA Manager
Date / Time / Timezone:
2018-02-07 / 10:00:00 / PDT/PST
2018-02-07 / 13:00:00 / EDT/EST
2018-02-07 / 16:00:00 / BRT/BRST
2018-02-07 / 18:00:00 / BST/GMT
2018-02-07 / 19:00:00 / CEST/CET
Whenever your design includes repeating IP blocks (for instance bitcells and sense-amps for memory, flip-flops, or other standard cells) you must design those IP blocks for high-yield towards process variation for the system to have any chance of working. This is because even one failing bitcell or sense amp can bring down the entire system.
MunEDA provides a tool called Worst-Case Analysis (WCA) as part of the WiCkeD(™) verification and optimization platform which accurately calculates high-sigma yield for your IP block and optimizes the block in order to bring your design within your system yield requirements.
Worst-case analysis is independent of sigma value and so doesn’t get bogged down with higher values of sigma.
This webinar will focus on why high-sigma is important to you, how you can leverage WiCkeD tools like WCA to pinpoint weaknesses of your design over all operating conditions and mismatch conditions, and optimize the design to completely flush out any variation-related weaknesses.