Videos
Introduction Evatronix IP Cores and Services & Low/Fast Speed Differential OpAmp in 40nm TSMC with WiCkeD
Session 3.2, C. Elgert, Evatronix
Sizing of FPGA cells with combination of WiCkeD and Least Squares Fitting
Session 2.4, J. Lin, Altera
WiCkeD + CustomSim-XA for Fast Monte Carlo & WiCkeD + Cadence for Design Intent Capturing
Session 2.3, E. Raciti, STMicroelectronics
Low Power MPSoC Circuit Design in GLOBALFOUNDRIES 28nm CMOS with WiCkeD
Session 1.5, S. Höppner, Technical University Dresden
Agilent GoldenGate RFIC Simulation and Analysis Software and Interoperability with MunEDA WiCkeD
Session 1.3, I. Nickeleit, Agilent
STMicroelectronics : Optimization of a 2.133GHz level shifter in 28nm
Session 6.4, N. Seller, STMicroelectronics
TU-Dresden: Design Flow Integration of the Linearized Operating Point (LOP) Method for Fast Voltage Range Estimation with WiCkeD (SyEnA)
Session 6.3, S. Höppner, Technical University Dresden
ON Semiconductor: Methodologies for Mismatch Sizing and Corner Verification for Automotive Applications with WiCkeD (SMAC)
Session 4.3, J. Daniels, ON Semiconductor
