Videos
Samsung – AutoScript based WiCkeD design optimization flow setup for FinFET high-speed memory interface design
Session 6.3, J. Park, Samsung
STMicroelectronics Noida – Design optimization in deep-submicron technologies covering methodology for reliability based circuit optimization for IOs
Session 6.2, A. Gupta, STMicroelectronics
MunEDA Tutorial – Increase Efficiency and Quality of I/O Design by Circuit Sizing
Session 6.1, M. Pronath, MunEDA
STMicroelectronics Crolles – Overview of WiCkeD capabilities for Standard Cell Performances Optimization & High Sigma Yield Analysis
Session 5.4, N. B. Salem, STMicroelectronics
University Frankfurt/Main – An Unattended Circuit Optimization Flow for Digital Standard Cells using WiCkeD
Session 5.3, M. Meissner, University Frankfurt/Main
SKHynix – NAND Flash Cell Sensing Sensitivity Analysis & Improvement with WiCkeD
Session 5.2, J. H. Lee, SKHynix
Fraunhofer – Noise and performances analysis of a 180 nm CMOS OPAMP with WiCkeD
Session 4.2, J. F. Sanchez, Fraunhofer
STMicroelectronics Castelletto – Analysis and improvements for the AM RF section of a CMOS Tuner
Session 3.4, A. Capasso, STMicroelectronics
FAU – University Erlangen-Nuernberg – Verification and Optimization of Digital Radio Receiver Sub Circuits (LFoundry 150nm)
Session 3.3, C. Schmidt, University Erlangen
STMicroelectronics Catania – Application of MunEDA WiCkeD – Agilent GoldenGate integration for corner analysis and sizing of RF circuits
Session 3.2, A. Ciccazzo, STMicroelectronics
Lantiq – Process Characterization in 40nm and Level Shifter Optimization in 65nm (RF Design)
Session 3.1, G. Golla, Lantiq