STMicroelectronics – SMAC – Smart components and Smart Systems integration (FP7-ICT-2011-7)
Session 7.4, A. Ciccazzo, STMicroelectronics
MUGM 2014
ARP Microsystems – High-Voltage Automotive Analog IP Development for SOC using WiCkeD tools
Session 7.2, A. Bratsun, ARP Microsystems
STMicroelectronics – Design validation and development of RF macrocells (WebEx)
Session 7.1, A. Capasso, STMicroelectronics
Fraunhofer – Advanced measures for OpAmp optimization with WiCkeD
Session 6.4, E. Herzer, Fraunhofer IIS
University Frankfurt – FEATS – explorative automated topology synthesis with WiCkeD
Session 6.3, M. Meissner, Goethe University Frankfurt/Main
STMicroelectronics – Corner Verification and Design Optimization in Smart Power & Non-Volatile Memory Technologies
Session 6.2, P. Daglio, STMicroelectronics
MunEDA – Ultra High Sigma (6+ Sigma) Analysis – High Sigma is not enough (Tutorial)
Session 6.1, V. Gloeckel, MunEDA
Fraunhofer – Silicon Proof of the Intelligent Analog IP Design Flow using WiCkeD
Session 5.3, B. Prautsch, Fraunhofer IIS
HLMC – 55nm to 40nm Bandgap porting with SPT & High gain Amp optimization with MunEDA WiCkeD
Session 5.2, L. Ye, HLMC
Infineon – Safeguarding Holdtime Margin for Internal Scan Chain in Multibit-Register Standardcells
Session 4.2, A. Lang, Infineon
Sapienza University Rome – Digital standard cell noise margin optimization, also considering aging effects with MunEDA WiCkeD and Synopsys MOSRA tools (MANON)
Session 4.1, Z. Abbas, Sapienza University Rome