STMicroelectronics : Optimization of a 2.133GHz level shifter in 28nm
Session 6.4, N. Seller, STMicroelectronics
MUGM 2011
TU-Dresden: Design Flow Integration of the Linearized Operating Point (LOP) Method for Fast Voltage Range Estimation with WiCkeD (SyEnA)
Session 6.3, S. Höppner, Technical University Dresden
ON Semiconductor: Methodologies for Mismatch Sizing and Corner Verification for Automotive Applications with WiCkeD (SMAC)
Session 4.3, J. Daniels, ON Semiconductor
STMicroelectronics: AMS Design Flow and Standardization of Analog Design Intents
Session 2.2, P. Daglio, STMicroelectronics
STMicroelectronics: Reducing Mismatch Impact by means of Proper Biasing in Fully Differential CMOS Structures
Session 1.3, A. Capasso, STMicroelectronics