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I/O Design Optimization Flow for Reliability in Advanced CMOS Nodes with WiCkeD

Authors

F. Cacho, A. Gupta, A. Aggarwal, G. Madan, N. Bansal, M. Rizvi, V. Huard, P. Garg, C. Arnaud, R. Delater
C. Roma, A. Ripp, MunEDA

Published in

IRPS 2014, June 2014, Hawaii, USA

Link

https://ieeexplore.ieee.org/document/6860592