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ZMD and MunEDA Present Technical Paper and Talk at VDE Conference Reliability and Design (ZuD) in Munich

Munich/Dresden, Germany - Wednesday, March 07th, 2007

Chipmaker and Design house ZMD-ZFOUNDRY ( and EDA-Vendor Mun-EDA ( will present a technical paper together and talk about "Robust Analog Design for Automotive Applications by Design Centering" at the VDE Conference Reliability and Design (ZuD) in Munich. Speakers are Dr. Udo Sobe and Karl-Heinz Rooch from ZMD-ZFOUNDRY as well as Dr. Michael Pronath, Vice President Products & Solutions from MunEDA.

The talk will discuss the effects of random variations during the manufacturing process on devices, which can be simulated as a variation of transistor parameters. Device degradation, due to temperature or voltage stress, causes a shift of device parameters, for example thresh-old voltage Vth, which can also be modelled as a degradation of transistor parameters. There-fore, in order to design circuits, which are robust and reliable, analysis and optimization of their sensitivity to variations in model parameters is important. Furthermore, constraints on the operating regions and voltage differences of transistors are used in order to keep operating points stable over a large temperature range. Based on three example circuits for automotive applications and current process development kits (PDK), the speakers will show how design centering software can be used to consider both sensitivity reduction towards model parameter variation and constraints to control safe operating areas (SOA).

Dr. Udo Sobe, Mixed-Signal Design Flow Engineer, ZMD-ZFOUNDRY: "In this paper we have shown, how reliability issues of current PDKs can be taken into account by using WiCkeD, using three practical design examples for automotive applications. At this point, design centering is used to decrease the sensitivity of parameter changes and to check SOA constraints. Even though the design effort directed at higher reliability includes a set of meas-ures, such as handling substrate currents, design centering is the key to improving the yield."

Dr. Michael Pronath, Vice President Products & Solutions, MunEDA: "The use of SOA methodology is a way of ensuring reliability. The combination of both yield improvement and consideration of SOA constraints is one key to designing robust and reliable circuits. In this context, besides the substrate current and future prediction of long term reliability via simula-tion, our main attention is focused on the influence of high temperatures on parameter change."

About VDE Conference Reliability & Design (ZuD)
The VDE Conference Reliability & Design (ZuD) will take place on March 26-28, 2007 in Maritim Hotel in Munich. MunEDA ( will act as official co-sponsor of the conference. Other speakers at the conference include colleagues from companies such as In-fineon, Atmel, X-Fab, Bosch, IBM, ARM, Intel, AMD, Cadence, Qimonda, Fraunhofer, Nokia, as well as numerous universities and research institutes. To find out more information about the VDE Conference Reliability and Design (ZuD) please visit the official website:

About MunEDA
MunEDA develops and licenses EDA tools and solutions that analyze, model, optimize and verify the performance, robustness and yield of analog, mixed-signal and digital circuits. Leading semiconductor companies rely on MunEDA's WiCkeD' tool suite - the industry's most comprehensive range of advanced circuit analysis solutions - to reduce circuit design time and achieve maximum yield in their communications, computer, memory, automotive and consumer electronics designs. Founded in 2001, MunEDA is headquartered in Munich, Germany, with offices in Cupertino, California, USA (MunEDA Inc.), and leading EDA distributors in the U.S., Japan, Korea, Taiwan, Singapore, Malaysia, Scandinavia, and other countries worldwide. For more information, please visit MunEDA at