We are pleased to invite you to the MunEDA Users Group Meeting 2013.
MUGM 2013 will take place on October 10th & 11th (Thu/Fri), 2013 in Munich, Germany. The goal of the event is an intensive exchange of knowledge by new and experienced industrial users. MUGM provides an open forum for engineers interested in MunEDA solutions for Custom IC Design Migration, Analysis, Modelling and Optimization.
This years focus of the MunEDA User Group Meeting 2013 will be the special topic:
Circuit Design Migration, High-Sigma Analysis & Verification and Circuit Optimization in Nanometer Technologies
Date:
October 10 – 10:30 a.m. to 06:00 p.m.
October 11 – 09:00 a.m. to 06:00 p.m.
Location:
Holiday Inn Munich
Hochstrasse 3
81669 Munich, Germany
Selection of Presentation Topics at MUGM 2013:
- Design Migration & Schematic Porting
- Design analysis and sizing for FinFet Technologies
- Design analysis and sizing for FDSOI Technologies
- Management of design contraints and sizing rules
- Corner and statistical verification
- Monte-Carlo Roma and Yield Analysis
- Worst-Case and High-Sigma Statistical Analysis
- Circuit Modelling and Model Generation
- Circuit sizing and optimization
- IP sizing in Nanometer process technologies
- Memory, Standard Cell, IP Libraries, RF-Design
- Low-Power design analysis and optimization
Thursday, 10th October, 2013
09:30 – 10:30 | Registration & Welcome Coffee |
10:30 – 12:30 | Session 1: Keynotes & What’s new |
10:30 – 10:45 | STMicroelectronics – MUGM 2013 Chair Opening Remarks P. Daglio, STMicroelectronics – MUGM 2013 Conference Chair |
10:45 – 11:00 | MunEDA – Welcome & Whats new A. Ripp, VP Sales & Marketing, MunEDA |
11:00 – 11:45 | GLOBALFOUNDRIES – Keynote – Challenges in Deep-Submicron Technologies – Design Migration & Reuse G. Teepe, GLOBALFOUNDRIES |
11:45 – 12:30 | Berkeley Design Automation – Nanometer Circuit Verification & Analog Characterization Environment P. Estrada, Berkeley Design Automation |
12:30 – 13:45 | MUGM Group Picture & Lunch Break |
13:45 – 15:30 | Session 2: Nanometer Verification & Design Environments |
13:45 – 14:10 | MunEDA – What’s new in WiCkeD 6.6 – Integration & R&D Roadmap F. Schenkel, VP Research & Development, MunEDA |
14:10 – 14:35 | Altera – Power and performance optimization with transistor variables on custom circuits using MunEDA WiCkeD G. H. Oh, Altera |
14:35 – 15:00 | STMicroelectronics Crolles – WiCkeD/Virtuoso Design Intents Flow for STMicroelectronics CMOS14FDSOI (14nm) R. Stewart, STMicroelectronics |
15:00- 15:30 | MunEDA Tutorial – Analyzing the Effects of Process Variation and Mismatch on Circuit Design: Monte Carlo and Alternatives (Part 1) M. Pronath, VP Products & Solutions, MunEDA |
15:30 – 16:15 | Coffee Break – Demos & Exhibition |
16:15 – 18:00 | Session 3: RF Design |
16:15 – 16:45 | Lantiq – Process Characterization in 40nm and Level Shifter Optimization in 65nm (RF Design) G. Golla, Lantiq |
16:45 – 17:10 | STMicroelectronics Catania – Application of MunEDA WiCkeD – Agilent GoldenGate integration for corner analysis and sizing of RF circuits A. Ciccazzo, STMicroelectronics |
17:10 – 17:30 | FAU – University Erlangen-Nuernberg – Verification and Optimization of Digital Radio Receiver Sub Circuits (LFoundry 150nm) C. Schmidt, University Erlangen |
17:30 – 18:00 | STMicroelectronics Castelletto – Analysis and improvements for the AM RF section of a CMOS Tuner A. Colaci, A. Capasso, STMicroelectronics |
18:00- 18:05 | Wrap-up Day 1 and Directions A. Ripp, VP Sales & Marketing, MunEDA |
From 19:30 | Social Event at Zum Franziskaner |
Friday, 11th October, 2013
09:00 – 10:30 | Session 4: Analog, MEMS & System-Level Design |
09:00 – 09:30 | IMMS – Using WiCkeD in MEMS design V. Boos, IMMS |
09:30 – 10:00 | Fraunhofer – Noise and performances analysis of a 180 nm CMOS OPAMP with WiCkeD J. Ferro Sanchez, Fraunhofer |
10:00 – 10:30 | Fraunhofer – COSIDE: A new solution for heterogeneous system specification T. Hartung, K. Einwich, Fraunhofer |
10:30 – 11:15 | Coffee Break – Demos & Exhibition |
11:15 – 13:00 | Session 5: Low Power & Standard Cell Design |
11:15 – 11:45 | MunEDA Tutorial – Low Power OpAmp Optimization with WiCkeD M. Siu, Application Engineer, MunEDA |
11:45 – 12:10 | SKHynix – NAND Flash Cell Sensing Sensitivity Analysis & Improvement with WiCkeD J. H. Lee, SKHynix |
12:10 – 12:30 | University Frankfurt/Main – An Unattended Circuit Optimization Flow for Digital Standard Cells using WiCkeD M. Meissner, University Frankfurt/Main |
12:30 – 13:00 | STMicroelectronics Crolles – Overview of WiCkeD capabilities for Standard Cell Performances Optimization & High Sigma Yield Analysis N. B. Salem, STMicroelectronics |
13:00 – 14:30 | Lunch Break |
14:30 – 15:50 | Session 6: I/O, Memory & IP Design |
14:30 – 14:50 | MunEDA Tutorial – Increase Efficiency and Quality of I/O Design by Circuit Sizing M. Pronath, VP Products & Solutions, MunEDA |
14:50 – 15:10 | STMicroelectronics Noida – Design optimization in deep-submicron technologies covering methodology for reliability based circuit optimization for IOs A. Gupta, STMicroelectronics |
15:10 – 15:30 | Samsung – AutoScript based WiCkeD design optimization flow setup for FinFET high-speed memory interface design J. Park, Samsung |
15:30 – 15:50 | viimagic – FTP (Foundry-Technology-Platform) Porting of an AMS IP (ADC Buffer) to LFoundry LF150 using MunEDA WiCkeD and IPGen 1Stone on viimagic inhouse flow A. Momin, viimagic |
15:50 – 16:30 | Coffee Break – Demos & Exhibition |
16:30 – 17:30 | Session 7: Nanometer Verification & RFID |
16:30- 17:15 | MunEDA Tutorial – Analyzing the Effects of Process Variation and Mismatch on Circuit Design: Monte Carlo and Alternatives (Part 2) M. Pronath, VP Products & Solutions, MunEDA |
17:15 – 17:30 | CEITEC – RFID, Wireless Communications and Digital Multimedia Technology made in Brasil F. Chavez, CEITEC |
17:30 – 17:45 | Wrap-up & Farewell |
Zum Franziskaner
Here you will find the password protected MUGM 2013 proceedings:
https://www.muneda.com/mugm/mugm-2013/proceedings/