Yield optimization for low power current controlled current conveyor
Authors:
Z. Abbas, M. Olivieri, A. Ripp, G. Strube, M. Yakupov
Papers & Publications
Strategies for Initial Sizing and Operating Point Analysis of Analog Circuits
Authors:
V. Boos, J. Nowak, S. Henker, S. Hoeppner, M. Sylvester, H. Grimm
Systematic Analysis & Optimization of Analog/Mixed-Signal Circuits Balancing Accuracy and Design Time
Authors:
A. Colaci, G. Boarin, A. Roggero, L. Civardi, C. Roma, G. Strube, A. Ripp and M. Pronath
Robust Analog Design for Automotive Applications by Design Centering With Safe Operating Areas
Authors:
U. Sobe, K.-H. Rooch, D. Mörtl, A. Graupner, A. Ripp, M. Pronath, MunEDA GmbH, Munich, Germany
Experimental Verification of Simulation Based Yield Optimization for Power-On Reset Cells
Authors:
G. Rappitsch, O. Eisenberger, B. Obermeier, A. Ripp, M. Pronath
Initial sizing of analog integrated circuits by centering within topology-given implicit specifications
Authors:
G. Stehr, M. Pronath, F. Schenkel, H. Graeb, K. Antreich
WiCkeD: analog circuit synthesis incorporating mismatch
Authors:
K. Antreich, J. Eckmueller, H. Graeb, M. Pronath, F. Schenkel, R. Schwencker, S. Zizala
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