MunEDA Customers

Samsung LSI

Samsung LSI at MUGM MunEDA User Group Meeting 2013

"We use MunEDA's tools for design optimization and statistical analysis to optimize various optimized memory interface IP blocks for our new FinFET technology and achieved an average reduction of design turnaround time of 50%, more than 6% performance improvement and up to 15% area reduction."
Samsung - AutoScript based WiCkeD design optimization flow setup for FinFET high-speed memory interface design

Altera at MUGM MunEDA User Group Meeting 2010

"We have been running MunEDA WiCkeD Worst Case Analysis to determine static noise margin at 6.5 sigma and used such cells with mismatch parameters at 6.5 sigma for system-level simulations for our Stratix Products since 40nm."
Altera - Applications of WiCkeD in FPGA Cell Design

STMicroelectronics at MUGM MunEDA User Group Meeting 2013

"MunEDA WiCkeD is extremely useful for reliability-aware design optimization of standard I/Os to meet tight specifications, ensure good design margins and reduce the design time dramatically."
STMicroelectronics - Design optimization in deep-submicron technologies covering methodology for reliability based circuit optimization for IOs

SKHynix at MUGM MunEDA User Group Meeting 2012

"MunEDA's tools are best-in class for interactive and fully automatic yield analysis and optimization in circuit design. As for every semiconductor company, design targets like high performance and yield are number one research goals that imply both profitability and time to market. We added MunEDA's solutions to Hynix design environment to follow our track in establishing best design methodologies to our design groups and therefore improve quality assurance to our customers."

TSMC at MUGM MunEDA User Group Meeting 2011

"We are happy to collaborate with MunEDA, the experts on statistical circuit analysis and specification-driven circuit design automation. WiCkeD delivers a substantial benefit to the designers using TSMC technology."

SMIC at MTF MunEDA Technical Forum Shanghai 2014

"With our WiCkeD-based debug flow we are able to verify feasibility and quality of our designs and list all effective influences with priority" SMIC - 40nm 10bit SAR ADC debug and yield optimization using MunEDA WiCkeD

Toshiba Corporation at MUGM MunEDA User Group Meeting 2012

"After intensive evaluations, we selected the WiCkeD tool suite to enhance our productivity for analog-mixed-signal design products. Using WiCkeD on different projects, we achieved speed-ups in our circuit analysis, porting and sizing process, reducing the sizing time and effort to deliver quality products for 40nm and below in time."

Microsemi at MUGM MunEDA User Group Meeting 2012

"The optimization of the SenseAmp for SRAM with WiCkeD took only one day. This is speed-up 5-10X compared to pure manual operation." Microsemi - Using WiCkeD for SRAM Sense Amp Optimization

Infineon Technologies at MUGM MunEDA User Group Meeting 2007

""WiCkeD has been seamlessly integrated in the designflow of Infineon for more than a decade. This tool and integration has shown to be very valuable for the designers because it allows them to use a completely GUI-based operation of WiCkeD inside the design framework.""


""Designing mixed-signal ICs is challenging and complex. We are pleased to add MunEDA's methodologies for circuit performance, statistical analysis and yield optimization to our full statistical modeling support. This powerful software helps our customers make their analog/mixed-signal designs more robust and get to market faster.""

Faraday Technology Corporation

""MunEDA's WiCkeD showed the capability as an optimization tool in the key role of our IP porting project. The capacity is a general issue for the simulation-based optimization tool. We successfully could demonstrate the circuit optimization process through the comprehensive GUI and script based flow.""


"After testing MunEDA's design and yield optimization tool WiCkeD in some very successful pilot projects, we chose it for analysis and optimization of analog and mixed-signal circuits and towards increased yield and robustness of our golden IP library."