SemiWiki Blog: AMS, RF and Digital Full Custom IC Designs need Circuit Sizing
My career started out by designing DRAM circuits at Intel, and we manually sized every transistor in the entire design to get the optimum performance, power and area.
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SemiWiki Blog: CEO Interview with Harald Neubauer from MunEDA
It has been my pleasure to interview Harald Neubauer, CEO of MunEDA. A veteran of the EDA industry, Harald cofounded MunEDA in 2001.
Yield-optimization of CMOS full-adder design with PVT variations and NBTI
We present the detailed results of the application of mathematical optimization algorithms to transistor sizing in a full-adder cell design,… Read More »Yield-optimization of CMOS full-adder design with PVT variations and NBTI
Analog IP Migration and Verification
Introduction Semiconductor companies designing ICs for smart phones, automotive and industrial applications, CPUs, GPUs and memory components all employ teams… Read More »Analog IP Migration and Verification
Standard Cell & I/O Custom Cell Design Sizing
Introduction Standard cells are group of transistors and interconnect structures that provide boolean logic funtions (e.g. AND, OR, XOR, XNOR,… Read More »Standard Cell & I/O Custom Cell Design Sizing
SemiWiki Blog: 56th DAC – In Depth Look at Analog IP Migration from MunEDA
The blog covers MunEDA’s tutorial at the 56th DAC in Las Vegas on Analog IP migration and optimization.
SemiWiki Blog: A Practical Approach to Modeling ESD Protection Devices for Circuit Simulation
Lurking inside of every Mosfet is a parasitic bipolar junction transistor (BJT). Of course, in normal circuit operation the BJT does not play a role in the device operation.
Visit MunEDA Booth #1463 at DAC 2018 in San Francisco – Mon-Wed June 25-27
Please visit MunEDA booth #1463 at DAC Design Automation Conference – Exhibition – Mon-Wed June 25-27, 2018 in San Francisco,… Read More »Visit MunEDA Booth #1463 at DAC 2018 in San Francisco – Mon-Wed June 25-27
SemiWiki Blog: Schematic porting – the key to analog design reuse
The blog emphasizes the importance of reusability in electronic design projects and discusses the challenges associated with reusing blocks from different design types.
SemiWiki Blog: Using Sequential Testing to Shorten Monte Carlo Simulations
The blog introduces Sequential Testing, a technique presented at the MunEDA User Group Meeting in Munich.
SemiWiki Blog: Seeking Solution for Saving Schematics?
The blog discusses Munich-based MunEDA’s upgraded schematic porting tool, SPT, which streamlines the process of reusing existing schematics in analog design.
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