User Blog by Daniel Payne 08-24-2022 at 10:00 am
The author discusses advancements in automated layout generation for analog integrated circuits (ICs), focusing on ADC design. A recent article presents a multi-level design flow using template-based layout generators and structural models. The approach combines three techniques: template-based generator, parasitic estimation, and fast model-based simulation. The process involves creating a SystemC AMS model, optimizing the ADC with estimated parasitics, and generating layouts quickly. Results show efficient optimization, reduced layout area, specific aspect ratios, and robustness against variations. The study highlights worst-case transfer functions based on various design parameters, demonstrating the effectiveness of the automated approach.
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