MunEDA Low Power Custom IC Design (Analog, RF) - Highlights

• Automated Circuit Performance Tuning
• Design for Yield & High-Sigma Robustness
• Robustness Verification

Challenges for Low Power Custom IC Design

In all designs today, power is a concern. For mobile devices, very low power consumption is a main design objective. Especially analog and mixed-signal designers in the fields of:


spend much effort to create circuits that fulfill their specification reliably with a small power budget. Within such circuits designers have to consider many influence factors such as:


Within the circuit sizing process in regards to low and ultra-low power design all these influence factors and their trade-offs have to be taken into account.

Typical Circuit Applications - Full Custom Low Power Design

Typical applications for using WiCkeD in full custom low power design are:

Low Power Custom IC Design Flow with MunEDA WiCkeD

The MunEDA WiCkeD tool set provides significant productivity gains over traditional design methods, and enables advanced circuit architectures with lower power consumption and higher performance.

High performance, high speed, low power design, low noise requirements happen pre-dominantly in advanced technology nodes. For this reason designers can benefit from MunEDA's circuit sizing tools to optimize performances, power, noise, area, yield and others.

WiCkeD has sufficient capacity to analyze and size large circuits:

• >100 specifications and constraints handled simultaneously
• >200 design variables, >2000 MOS
• Post-layout effects and parasitics supported
• Multiple test benches, goals, corners, considered

Solution - WiCkeD Tool Flow for Low-Power Design

MunEDA world- class outstanding circuit optimization tools help designers to save a significant amount of time on circuit sizing and optimization for speed and power consumption.


When having a circuit testcase with a power or noise issue the designer can use the MunEDA WiCkeD tools to analyse design challenges and fix it using the powerful MunEDA optimizers. First step for performance tuning is always a feasibility check if all design constraints are fulfilled. Next a sensitivity and trade-off analysis will be fulfilled to check the circuit performances. A deterministic nominal optimization will be used to bring all performances into their nominal specification bounds. As next the statistical effects such as behavior at process and operating corners will be checked for the given design and a statistical mismatch analysis will be fulfilled. Finally the circuit will be optimized for best robustness and yield with YOP Yield Optimization. All results will be verified using MunEDA WiCkeD high-performance Worst-Case and High-Sigma Analysis methods including statistical verification with WiCkeD’s advanced Monte Carlo Analysis. Result is a circuit testcase optimized for low-power and low-noise with best possible performance.

MunEDA WiCkeD - Technology Support

• WiCkeD is integrated and supports the major design frameworks and simulators as well as stand-alone or customized environments
• MunEDA WiCkeD supports many different foundry technologies and PDKs in many different technology nodes
• For more information and support contact www.muneda.com/contacts.php

WiCkeD for Standard & I/O Cell Design - User Benefits

• Smart, Fast, Reliable!
• Quickly detect critical transistors and non linearities vs. operating conditions
• Determine Performance Worst Case Operating Conditions for each corner
• Optimize Performance @ Nominal + Worst Case Operating Conditions & Corners!

Standard Cells

Standard cells are group of transistors and interconnect structures that provide boolean logic funtions (e.g. AND, OR, XOR, XNOR, inverters) or a storage function (flipflop or latch). The simplest cells are direct representations of the elemental NAND, NOR, and XOR boolean function, although cells of much greater complexity are commonly used (such as a 2-bit full-adder, or muxed D-input flipflop).

Standard Cell Design Objectives & Challenges

The major objectives for the design of standard cells are:

• Optimization of standard cell main performances
  • Improve Timing, Save Power
• Analysis & Optimization of standard cell performances robustness
  • Ensure immunity to process parameter variations (global & local variation, mismatch)
  • Statistical Analysis
• Achieve reliable solutions for desired implementations
  • Sustaining electrical constraints (multi voltage operating points, frequencies)
  • Matching layout requirements (Area, DFM)
  Here the standard cell designer is confronted with many challenges and decisions e.g. which performances to optimize, which constraints to apply or which design parameter to vary. Additionally he has to face also different operating parameters (voltages, temperatures, etc.), multiple process corners (SNSP, FNSP, etc.) and multiple loads or slope transitions. Further restrictions are often also simulation resources and CPU time.

Solution - MunEDA WiCkeD Analysis and Optimization for Standard Cell Design & Reliability Flow

MunEDA WiCkeD Analysis and Optimization for Standard Cell Design Flow

Using different analysis and optimization tools of MunEDA WiCkeD the standard cell designer can solve many of the above described challenges. He first starts with the selection and description of the testcase including testbenches (e.g. Flip Flop, Latch, o.a.). Main circuit features are given by the circuit topology, technology and performance definitions. Using the powerful WiCkeD CED Constraint Editor the designer can add all desired netlists with one mouse-click, then define the constraints and performances and also check the initial conditions and corners. The user can with WiCkeD CRN Corner Run Analysis perform a corner run for every constraint. After this using WiCkeD BAS Basic & Sensitivity Analysis the designer identifies critical transistors and checks non-linearities vs the defined operating parameters. With WiCkeD WCO Worst Case Operation analysis the designer then can cross-check easily the worst case performances against all operating conditions and corners.

After this he can use the powerful and numerous silicon-proven optimization algorithms of WiCkeD DNO Deterministic Optimization to determine the performance worst case operating conditions for each corner and finally run performance optimization @ nominal + worst case operating conditions and corners. Goal is to converge all performances with a minimum number of iterations including the fulfilment of all constraints to guarantee a feasible solution

MunEDA WiCkeD for Standard Cell Reliability Flow

With MunEDA WiCkeD the standard cell designer can very easily setup his circuit for statistics and perform mismatch and yield analysis. For this reason he only has to use WiCkeD CED Constraint Editor of the already setup cell to set mismatch parameters, activate the mismatch devices and match physical identical transistors. For more in-depth statistical analyses numerous powerful high-sigma analysis methods are available such as Corner Run Analysis, Monte-Carlo-Analysis, Process Sensitivity Analysis, Parameter Distribution, Performance Distribution, Parameter Sweeps, Worst-Case Analysis & Diagnosis, Mismatch Analysis, and many more. WiCkeD’s unique and powerful silicon-proven YOP Yield Optimization improves yield and performance reliability to the maximum.

MunEDA WiCkeD - Technology Support

• WiCkeD is integrated and supports the major design frameworks and simulators as well as stand-alone or customized environments
• MunEDA WiCkeD supports many different foundry technologies and PDKs in many different technology nodes
• For more information and support contact www.muneda.com/contacts.php

Circuit Modelling & Model Generation with WiCkeD RSM

User Benefits:

• Increased circuit design flexibility
• Speed-up of simulations and reducing simulation effort
• Mixed transistor-system-level circuit optimization possible
• Provides more Flexibility to the designer

Often individual custom circuits will be embedded into larger systems and whole chips and therefore require consistency in circuit and system-level simulation.

For this reason such circuits should be modelled easily to check the circuit behaviour and performances and even statistical influences on the circuits and the whole system. For this reason MunEDA offers its tool RSM (Response Surface Modelling) as part of the WiCkeD tool suite.

Features of WiCkeD RSM:

• Creates response surface models of circuit performances with respect to parameters
• Numerous Modeling Types: Latin Hypercube, Polynomial, RBI Radial Basis Functions, ARBI, PolyRBI, Cubic RBI, a.o.
• Models can be used inside WiCkeD with other analyses and optimization modules
• Models can be written in Verilog or VHDL format
• Operating conditions can be considered

RSM with Design Parameters

Applications of WiCkeD RSM:

• Simulation of arrays of similar blocks
• Complex circuits with cross-coupling effects
• Simulation of parasitic extracted views
• Block wise transistor level optimization together with Verilog models

Process Model Characterization & Process Model Backward Propagation with MunEDA WiCkeD

User Benefits:

• Check correlation between corner models with Monte Carlo distribution
• Useful for both design & production engineers

For Monte Carlo simulation statistical model parameters are needed:

• Local parameter variations for device mismatch
• Global parameter variations for process variations
• Correlation parameters for the dependency between global parameters.

In many cases it is hard to calculate standard deviations and correlation coefficients for global model parameter variations that are based on statistical measurements. From PCM measurements the standard deviations and correlation coefficients of PCM parameters (P) are well known, whereas for Monte Carlo simulation the standard deviations and correlation coefficients of model parameters (M) are needed.

With WiCkeD it is possible to set up a linear equation that describes the relations between the standard deviations and correlation coefficients of M and P and solve it in one step.

MunEDA WiCkeD - Technology Support

• WiCkeD is integrated and supports the major design frameworks and simulators as well as stand-alone or customized environments
• MunEDA WiCkeD supports many different foundry technologies and PDKs in many different technology nodes
• For more information and support contact www.muneda.com/contacts.php