muneda.com
Empowering Innovation
 
 
  • Solutions

    • Circuit Schematic Migration & IP Porting

      Variation Analysis, PVT, Monte Carlo & High-Sigma

      Circuit & Sensitivity Analysis PVT & Corner Analysis Monte Carlo Statistical Analysis 3-5 sigma High Sigma & Worst Case Analysis 6-9 sigma plus Robustness Verification Flow

      Circuit Sizing for Low Power, Yield & Reliability

      Performance & Corner based Sizing & Tuning Variation, Sigma & Yield based Sizing & Tuning Reliability & Aging based Sizing & Tuning

      Application Cases

      High Sigma for Memory Design (SRAM, DRAM, Flash, FPGA) Low Power Tuning & Sizing for Custom Circuits Standard Cell & I/O Custom Cell Design Sizing & Performance Optimization RSM Circuit Modelling & Model Generation Model Characterization & Process Model Backward Propagation
  • Support

    • Publications & Technical Papers

      May 31st 2017
      DAC 2017 MunEDA Booth Info Flyer
       Sep 30th 2016
      MunEDA White Paper - High sigma parametric yield estimation for SRAM and Standard Cells
       Aug 03rd 2016
      Yield-driven Power-Delay-Optimal CMOS full-adder design PVT NBTI (Sapienza, MunEDA)
       See more...

      Webinars

      Jun 01st 2017
      Low Power Circuit Sizing for IoT       See more...

      E-Learning

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      If you don't have an account, please register for E-Learning.

      MunEDA & Distributor-Net

      MunEDA WebEx

  • Community

    • Customers

      Selection of MunEDA Customers:
      Samsung LSI Altera SKHynix
      SMIC Toshiba Infineon
      See more...

      Partners and Associations

      Selection of MunEDA Partners:
      Synopsys Mentor Graphics Cadence
      TSMC GLOBALFOUNDRIES STMicroelectronics
      See more...

      MunEDA User Group Meetings

      Nov 07th 2017
      MunEDA User Group Meeting Europe 2017 - Munich, Germany       Mar 03rd 2016
      MunEDA Technical Forum Brazil 2016 - Trindade, Brazil       Oct 27th 2015
      MunEDA User Group Meeting Europe 2015 - Munich, Germany       See more...

      MunEDA University Program

      Selection of Members:
      Technical University of Munich Chair of Electronic Design Automation Chair of Technical Electronics
      Goethe University Frankfurt Institute of Microelectronic Systems Ulm - University of Applied Sciences
      See more...
  • Company

    • News

      Jun 01st 2017
      MunEDA Webinar - Low Power Circuit Sizing for IoT - Register now !       Jan 11th 2017
      SemiWiki - Analog, Low-power Optimization at SMIC       Aug 31st 2016
      SemiWiki - Three Steps for Custom IC Design Migration and Optimization       May 16th 2016
      SemiWiki - SRAM Optimization for 14nm and 28nm FDSOI with MunEDA WiCkeD       See more...

      Events

      Nov 07th 2017
      MUGM 2017 - MunEDA User Group Meeting - Munich, Germany       Jun 18th 2017
      DAC 2017 Austin TX - Austin, USA       See more...

      Company

      Contacts & Distributors About Us Management Advisory Board Directions Careers

      Corporate Headquarter

      MunEDA GmbH
      MunEDA GmbH
      Stefan-George-Ring 29
      81929 Munich, Germany

      fon: +49-89-93086-330
      fax: +49-89-93086-407
      email: info@muneda.com
      web: www.muneda.com
      map: Google-Maps
 
  • Solutions
    Circuit Migration | Analysis | Sizing & Tuning | Applications
  • Support
    Publications | Webinars | E-Learning | Distributor-Net | MunEDA WebEx
  • Community
    Customers | Partners | MUGM User Group | Uni-Program
  • Company
    Contacts | About Us | Management | Advisory Board | Directions | Careers
 
EDA Tools for Design Migration, Analysis & Verification, Tuning & Sizing of Custom IC Design
Jun 01st 2017
MunEDA Webinar - Low Power Circuit Sizing for IoT - Register ...
Jun 18th 2017
DAC 2017 Austin TX - Austin, USA
Join MunEDA Webinar on Jun 01 at 10 am (PDT/PST)
Low Power Circuit Sizing for IoT
Download MunEDA Paper - September 2016, Munich, Germany
MunEDA White Paper - High sigma parametric yield estimation for SRAM and Standard Cells
Join MunEDA User Group Meeting Europe 2017
from Nov 07 to Nov 08 in Munich
 
 
Circuit Schematic Migration & IP Porting
Learn more...
Variation Analysis, PVT, Monte Carlo & High-Sigma
Learn more...
Circuit Sizing for Low Power, Yield & Reliability
Learn more...
  • News
  • Events
  • Webinars
  • Papers
  • User Group Meetings
Jun
01st
2017
MunEDA Webinar - Low Power Circuit Sizing for IoT - Register now !
Jan
11th
2017
SemiWiki - Analog, Low-power Optimization at SMIC
Aug
31st
2016
SemiWiki - Three Steps for Custom IC Design Migration and Optimization
May
16th
2016
SemiWiki - SRAM Optimization for 14nm and 28nm FDSOI with MunEDA WiCkeD

See more...
Nov
07th
2017
MUGM 2017 - MunEDA User Group Meeting - Munich, Germany: Join the MunEDA User Community Event
Jun
18th
2017
DAC 2017 Austin TX - Austin, USA: Visit MunEDA Booth #1012 @ DAC 2017 in Austin TX

See more...
Jun
01st
2017
Low Power Circuit Sizing for IoT - Audience: Circuit Designer, Design Manager, CAD Engineers, EDA Manager

See more...
May
31st
2017
DAC 2017 MunEDA Booth Info Flyer
Sep
30th
2016
MunEDA White Paper - High sigma parametric yield estimation for SRAM and Standard Cells
Aug
03rd
2016
Yield-driven Power-Delay-Optimal CMOS full-adder design PVT NBTI (Sapienza, MunEDA)

See more...
Nov
07th
2017
MunEDA User Group Meeting Europe 2017 - Munich, Germany
Mar
03rd
2016
MunEDA Technical Forum Brazil 2016 - Trindade, Brazil
Oct
27th
2015
MunEDA User Group Meeting Europe 2015 - Munich, Germany

See more...
Application Cases
High Sigma for Memory Design (SRAM, DRAM, Flash, FPGA) Low Power Tuning & Sizing for Custom Circuits Standard Cell & I/O Custom Cell Design Sizing & Performance Optimization RSM Circuit Modelling & Model Generation Model Characterization & Process Model Backward Propagation
 
 
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